PDF Service Manual Pioneer MJ-L77 Minidisc Recorder - 435 KB

This service manual is for the Pioneer MJ-L77 Minidisc Recorder.

It contains detailed technical information necessary for repair and maintenance.

Inside you will find circuit diagrams, parts lists, and step-by-step adjustment instructions.

This manual is essential for any technician looking to service this classic piece of audio equipment.

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--- Page 1 ---
^                                                )
                                                                                     MINIDISC


                                                                                                                                           ORDER NO.
                                                                                                                                          RRV2201

MINIDISC RECORDER


MJ-L77
THIS MANUAL IS APPLICABLE TO THE FOLLOWING MODEL(S) AND TYPE(S).
                      Model
     Type                                            Power Requirement                                                    Remarks
                      MJ-L77
     MYXK                              AC220-230V
     NVXK                              AC230V


Γ· These products are component of systems. This product does not operate normally by
  itself.
  Please connect it to the STEREO CD RECEIVER XC-L77 and the DISPLAY UNIT DU-L77, an
  accessory of the XC-L77, for adjustment and operation inspection.

                Component                                             Model                             Service manual                   Remarks

 STEREO CD RECEIVER                                                   XC-L77                                  RRV2187
                                                  S-L9-LRW              ––                ––                  RRV2176
 SPEAKER SYSTEM                                       ––            S-L9-A-LRW             ––                 RRV2176
                                                      ––                ––            S-L8-LRW                RRV2178
 STEREO CASSETTE DECK                                                 CT-L77                                  RRV2199
 MINIDISC RECORDER                                                    MJ-L77                                  RRV2201               This manual.


CONTENTS
1. SAFETY INFORMATION ...................................... 2                 7. GENERAL INFORMATION ................................ 43
2. EXPLODED VIEWS AND PARTS LIST ............... 3                                7.1 DIAGNOSIS .................................................. 43
3. BLOCK DIAGRAM AND SCHEMATIC DIAGRAM ..... 8                                      7.1.1 TROUBLESHOOTING ........................... 43
4. PCB CONNECTION DIAGRAM ......................... 22                              7.1.2 DISASSEMBLY ...................................... 46
5. PCB PARTS LIST ............................................... 29              7.2 IC .................................................................. 49
6. ADJUSTMENT .................................................... 32          8. PANEL FACILITIES AND SPECIFICATIONS ....... 59

PIONEER CORPORATION 4-1, Meguro 1-chome, Meguro-ku, Tokyo 153-8654, Japan
PIONEER ELECTRONICS SERVICE, INC. P.O. Box 1760, Long Beach, CA 90801-1760, U.S.A.
PIONEER ELECTRONIC (EUROPE) N.V. Haven 1087, Keetberglaan 1, 9120 Melsele, Belgium
PIONEER ELECTRONICS ASIACENTRE PTE. LTD. 253 Alexandra Road, #04-01, Singapore 159936
c PIONEER CORPORATION 1999
                                                                                                                 T – ZZE AUG. 1999 Printed in Japan

--- Page 4 ---
5   6   7       8
                           MJ-L77


                                            A
     Short
for TESTMODE


                                            B


                                   C        C


     5.0


                                            D


               5   6   7
                           C   8
                                       21

--- Page 5 ---
MJ-L77


Mark No.          Description       Part No.         Mark No.       Description   Part No.


     TRANS. UNIT ASSY                                     BLUE IND. UNIT ASSY
SEMICONDUCTORS                                       SEMICONDUCTORS
     D4001                          1SS133                D4901                   EB3804X(BCDE)
                                                          D4902                   UDZS8.2B
COILS AND FILTERS
     L4001 FILTER                   VTL-262          OTHERS
                                                          J4902 JUMPER WIRE       D20PYY0210E
SWITCHES AND RELAYS
     RY4001                         ASR7013

CAPACITORS
     C4001, C4002 (0.01Β΅F/AC250V)   ACG7010
     C4011, C4012                   CKSQYF103Z50
     C4047, C4048                   CQMBA473J50

OTHERS
                  5P CABLE HOLDER   51048-0500
     CN4001       AC INLET          AKP7005
     J4001        JUMPER WIRE       D20PYY0515E
     H4001, H4002 HOLDER            AKR7001


     KEYR UNIT ASSY
SWITCHES AND RELAYS
     S4901                          ASG7013

CAPACITORS
     C4901                          CKSQYB102K50

RESISTORS
     R4907                          RD1/4PU391J
     Other Resistors                RS1/10S&&&J

OTHERS
            4P CABLE HOLDER         51048-0400
     CN4901 6P JUMPER CONNECTOR     52151-0610


     KEYL UNIT ASSY
SEMICONDUCTORS
     D4903                          SLR-343MC(NPQ)

SWITCHES AND RELAYS
     S4902                          ASG7013

OTHERS
           4P CABLE HOLDER          51048-0400
     J4903 JUMPER WIRE              D20PYY0425E


                                                                                             31

--- Page 6 ---
MJ-L77


                                                                                     7 Jitter/C1 Error Check at the time of Playback


                                                           CORE MAIN UNIT ASSY        SIDE A
                      Jitter Meter

                      LEVEL      JITTER


                                                                                EFM MON

                      GND
                                                          REFO


                                                          Connection diagram


8 Jitter/C1 Error Check at the time of Recording/Playback
 Step No.      Operation Keys and Operation Method               FL Display                       Status                            Remarks
    1       Turn on the power. Then, short the MECHA              EJECT       Test mode
            TEST jumpers (W4076 and W4098).
    2       Insert the test disc (GGF1277).                      LOADING
                                                                 GRT AJST
    3       Perform β€œ 5 Normal Adjustment ” (step 3, step 4).   AUTO AJST
    4       Press the MD REC key twice.                          TEST REC     TEST REC mode
    5       Press the SET key and display the inner             a0050 pw0D
            circumference address.
    6       When the MD PLAY key is pressed,               a0069 pw0D         Note: When the initial address (0050) part of
            TEST REC starts, and when 25 addresses or more TEST REC                 the inner circumference (or intermediate/
            have been sent, stop by pressing the 7 key.                             outer circumference) has been used 1000
                                                                                    times or more, press the + Β‘ key and
    7       Press the SET key and display the inner             a0050 pw0D
                                                                                    shift the address by 10hex. (The address
            circumference address.
                                                                                    is shifted (up to 10 times) according to the
    8       Press the MD REC key and display the                a03C0 pw0D          use frequency of the disc.)
            intermediate circumference.
    9       Perform step 6.                                     a03D9 pw0D
                                                                                                                                   Intermediate
                                                                 TEST REC
                                                                                                                                         and
    10      Press the SET key and display the inner             a0050 pw0D                                                              outer
            circumference address.                                                                                                 circumference
                                                                                                                                       may be
    11      Press the MD REC key twice and display the          a0700 pw0D
                                                                                                                                       omitted.
            outer circumference address.
    12      Perform step 6.                                     a0719 pw0D
                                                                 TEST REC
    13      Press the MD REC key.                               TEST PLAY     TEST PLAY mode


                                                                                                                                             41

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MJ-L77


PD5523A (IC104: CORE MAIN UNIT ASSY)
Mechanism Control m-com.
Pin Assignment (Top view)


Block Diagram

                                  8            8                8              8               8              8           8


                I/O PORT
                             Port P0       Port P1        Port P2         Port P3         Port P4        Port P5      Port P6


                    Internal Peripheral
                                                       A/D Converter
                                                                                                                              Port P7

                    Functions
                                                    (10bits Γ— 8 channels)
                           TIMER
                                             (expansion to 10 channels possible)                                                         8
                                                                                            System clock generation
                      Timer TA0 (16bits)       UART/clock-synchronized SI/O
                      Timer TA1 (16bits)           (8bits Γ— 2 channels)                          XIN – XOUT
                                                                                                                              Port P8


                      Timer TA2 (16bits)                                                        XCIN – XCOUT
                      Timer TA3 (16bits)
                                                     CHC operation circuit
                                                                                                                                         7


                      Timer TA4 (16bits)
                      Timer TB0 (16bits)
                                                       (CCITT method)
                      Timer TB1 (16bits)   (formation polynomial: X16 + X12 + X5 + 1)
                      Timer TB2 (16bits)
                                                                                                                              Port P85


                                            16 bits CPU CORE                                       MEMORY
                      Monitoring timer               Register
                         (16 bits)                                        Stack Pointer
                                                R0H    R0L                                               ROM
                                                 R0H R1L R0L                   ISP
                                                R1H
                                                 R1HR2 R1L                     USP
                                                                                                                              Port P9


                     DMAC (2 channels)              R3R2                  Vector Table                   RAM
                                                                                                                                         8


                                                    A0R3                      INTB                      10k bite
                                                    A1A0
                       D/A Converter
                                                    FBA1
                     (8bitsΓ— 2 channels)              FB
                                                                                                                              Port P10


                                                                        Analog Multiplier
                                                        SB
                                                                                                                                         8


                                                                                                                                                 51

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